Algorithms and techniques used in RELAX are described. RELAX is a time domain MOS digital circuit simulator based on a new analysis method ca/led Weveform Relaxation Method I which exploits decomposition techniques. Preliminary comparisons between RELAX and the standard circuit simulator SPICE2 have shown that RELAX is a fast end reliable circuit simulator.
MOS, circuit simulation, algorithms, analysis
In the VLSI era, the demand for time domain circuit simulation of larger and larger circuits is continuously growing in the industrial designers community. Consequently, the use of standard general purpose circuit simulators such as SPICE 2 and ASTAP 3 is becoming too expensive. Alternative methods have been proposed for the electrical analysis of large scale circuits to reduce the CPU time and storage requirement. A survey of these methods is given in Hachtel and Sangiovanni-Vincentelli 4 . These methods rely on the decomposition of the circuit equations at various levels (ie linear, nonlinear and differential). Among them, timing simulation first introduced in MOTIS 5 is perhaps the most well known method. The solution method upon which timing simulators are based applies decomposition to the nonlinear equations derived from the discretization of the differential equations describing the circuit to be analysed. The implementation of decomposition together with an event scheduling scheme in mixed-mode simulators such as SPICE 6 and DIANA 7 leads to electrical simulators which are considerably faster than standard circuit simulators. However, recent studies 6 have shown that timing simulation algorithms tend to handle poorly circuits conraining tight couplings between subcircuits (eg floating capacitive couplings and pass transistor couplings) and have stability problems. Hence these algorithms are suitable to a restricted class of circuits: MOS circuits with quasiunidirectional device models.
This paper describes a new MOS digital circuit simulator RELAX. RELAX uses a new analysis method called Waveform Relaxation Method which is fully described in 1 . This method is based on the decomposition of the differential equations describing the circuit to be analysed. Theoretical studies 1 have shown that, under very mild conditions which are usually satisfied in practice, the method has guaranteed convergence when applied to MOS circuits.