𝔖 Bobbio Scriptorium
✦   LIBER   ✦

PERFORMANCE ANALYSIS OF A PARALLEL BANYAN ATM SWITCH

✍ Scribed by T. H. Cheng; Y. Shen


Publisher
John Wiley and Sons
Year
1997
Tongue
English
Weight
187 KB
Volume
10
Category
Article
ISSN
1074-5351

No coin nor oath required. For personal study only.

✦ Synopsis


Asynchronous transfer mode (ATM) switches can be constructed by connecting multiple banyan networks in parallel. To utilize the capacity of the parallel banyan networks fully, it is crucial to allow up to L cells from each input to be switched, and up to L cells to be received by each output simultaneously, where L is the total number of parallel banyan networks. This is possible if the switch operates in L overlapping phases and one banyan network is used to switch cells in each phase. Although a couple of such designs have been proposed and simulated, there is a lack of suitable models for such switches to be analysed mathematically. In this paper, two approximate analyses of a parallel banyan ATM switch are described. A comparison of the analytical and simulation results show that the analyses give reasonably accurate results.


πŸ“œ SIMILAR VOLUMES


A fast parallel-tree switch architecture
✍ Mayez Al-Mouhamed; Habib Youssef; Wasif Hasan πŸ“‚ Article πŸ“… 1998 πŸ› John Wiley and Sons 🌐 English βš– 288 KB πŸ‘ 2 views

In this paper we present a novel fast packet switch architecture based on Banyan interconnection networks, called parallel-tree Banyan switch fabric (PTBSF). It consists of parallel Banyans (multiple outlets) arranged in a tree topology. The packets enter at the topmost Banyan. Internal conflicts ar

Performance analysis of shared buffer AT
✍ Simon Fong; Samar Singh πŸ“‚ Article πŸ“… 1998 πŸ› John Wiley and Sons 🌐 English βš– 126 KB

Performance analysis of an asynchronous transfer mode (ATM) switch involves modelling the input traffic source, the switching mechanism and the cell departure process. An important issue, which determines the overall accuracy in performance evaluation of the switch, is the use of an appropriate prob

RAZAN: a high-performance switch archite
✍ Mostafa Abd-El-Barr; Khalid Al-Tawil; Habib Youssef; Talha Al-Jarad πŸ“‚ Article πŸ“… 1998 πŸ› John Wiley and Sons 🌐 English βš– 213 KB πŸ‘ 2 views

In this paper a high-performance packet switch architecture based on the improved logical neighbourhood (ILN) interconnection network, called RAZAN, is presented. RAZAN is an N Γ— N multistage interconnection network (MIN) which consists of n stages, where n = log 2 N, of switching elements. Each sta

Performance analysis of switch access sy
✍ Bharat T. Doshi; Subrahmanyam Dravida; Daniel R. Jeske; Kamala P. Murti; Behrokh πŸ“‚ Article πŸ“… 2002 πŸ› Institute of Electrical and Electronics Engineers 🌐 English βš– 169 KB
A performance analysis scheme for intell
✍ C. Ben Ahmed; N. Boudriga; M. S. Obaidat πŸ“‚ Article πŸ“… 1999 πŸ› John Wiley and Sons 🌐 English βš– 272 KB πŸ‘ 2 views

An intelligent network (IN) is a concept characterized by the distribution of network intelligence and capabilities wherever required within a telecommunications network. It is considered as a platform de"ning an environment that is rich in network capabilities and service functionality. IN techniqu

Performance evaluation of an ATM switch
✍ Shingo Suzuki; Kenji Nakagawa πŸ“‚ Article πŸ“… 2000 πŸ› John Wiley and Sons 🌐 English βš– 222 KB πŸ‘ 2 views

In order to adaptively control network congestion, an ATM switch with input and output buffers using back pressure has been proposed. The characteristic of such an ATM switch has been evaluated by the Monte Carlo (MC) method. However, the conventional MC method can provide cell loss probability on t