✦ LIBER ✦

On structured gate forest VLSI design

✍ Scribed by Gerhard Roos; Jens Leenstra; Thomas Schwederski; Lambert Spaanenburg; Bernd Hoefflinger

No coin nor oath required. For personal study only.

📜 SIMILAR VOLUMES

Gate Arrays for VLSI Design

✍ Fulkerson, D. 📂 Article 📅 1982 🏛 IEEE 🌐 English ⚖ 618 KB

NMOS dense gate matrix VLSI design

✍ Schmidt, K.H.; Mueller-Glaser, K.D. 📂 Article 📅 1983 🏛 IEEE 🌐 English ⚖ 380 KB

Plessey system ‘designs 25000-gate VLSI

📂 Article 📅 1985 🏛 Elsevier Science 🌐 English ⚖ 372 KB

Studies in VLSI technology economics. IV

✍ Fey, C.F.; Paraskevopoulos, D.E. 📂 Article 📅 1989 🏛 IEEE 🌐 English ⚖ 651 KB

On squashing hierarchical designs [VLSI]

✍ Kaser, O. 📂 Article 📅 1995 🏛 IEEE 🌐 English ⚖ 592 KB

[IEEE 21st International Conference on V

✍ Das, Bishnu Prasad; Amrutur, Janakiraman V. Bharadwaj; Jamadagni, H.S.; Arvind, 📂 Article 📅 2008 🏛 IEEE 🌐 English ⚖ 996 KB