Networks on Chips. Technology and Tools

✍ Scribed by Luca Benini and Giovanni De Micheli (Auth.)

• Publisher: Morgan Kaufmann
• Year: 2006
• Tongue: English
• Leaves: 395
• Category: Library

✦ Synopsis

• “The design of a complex SoC requires the mastering of two major tasks: The design of the computational elements and of their interconnect. The exponentially increasing complexity and heterogeneity of future SoCs forces the designer to abandon traditional bus -based structures and to implement innovative networks-on-chip. This book, written by two leading researchers, is the first of its kind. It is a must on the bookshelf of anybody having an interest in SoC design.” — Heinrich Meyr, Professor RWTH Aachen University and Chief Scientific officer, CoWare, Inc. “This is a highly recommended, informative reference book, with high quality contents provided by the leading experts of the area.” — Professor Bashir M. Al-Hashimi, Electronic Systems Design Group, Department of Electronics and Computer Science, University of Southampton, UK “An in-depth analysis of all the on-chip communication challenges, from physical wiring implementation up to software architecture, and a complete classification of their various Network-on-Chip approaches and solutions, make this book a reference for engineers involved in specification, design or evaluation of NoC architectures.” —Philippe Martin, Product Marketing Director, Arteris “Designers of Systems-on-a-Chip (SoC) are now struggling with the uncertainty of deep submicron devices and an explosion of system complexity. Networks on Chip (NoC) is a new paradigm of SoC design at the system architecture level. A protocol stack of NoC introduced in this book shows a global solution to manage the complicated design problems of SoC. This book gives a clear and systematic methodology of NoC design and will release designers from the nightmare of fights against signal integrity, reliability and variability.” — Hiroto Yasuura, Director and Professor, System LSI Research Center (SLRC), Kyushu University, Fukuoka, Japan
  

✦ Table of Contents

Content:
About the Authors, Pages ix-x
List of Contributors, Page xi
Chapter 1 - Networks on Chip, Pages 1-22
Chapter 2 - Network Architecture: Principles and Examples, Pages 23-43
Chapter 3 - Physical Network Layer, Pages 45-74
Chapter 4 - The Data-Link Layer in NoC Design, Pages 75-145
Chapter 5 - Network and Transport Layers in Networks on Chip, Pages 147-202
Chapter 6 - Network Interface Architecture and Design Issues, Pages 203-284
Chapter 7 - NoC Programming, Pages 285-322
Chapter 8 - Design Methodologies and CAD Tool Flows for NoCs, Pages 323-354
Chapter 9 - Designs and Implementations of NoC-Based SoCs, Pages 355-383
Index, Pages 385-395