𝔖 Bobbio Scriptorium
✦   LIBER   ✦

Mutation Testing Cost Reduction Techniques: A Survey

✍ Scribed by Usaola, M.P.; Mateo, P.R.


Book ID
119812173
Publisher
IEEE
Year
2010
Tongue
English
Weight
927 KB
Volume
27
Category
Article
ISSN
0740-7459

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## Abstract It is common to use ATPG of scan‐based design for high fault coverage in LSI testing. However, significant increases in test cost arise with increasing design complexity. Recent strategies for test cost reduction combine ATPG and BIST techniques. Unfortunately, these strategies have ser