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BAST: BIST-aided scan test. A new method for test cost reduction

✍ Scribed by Takashi Aikyo; Takahisa Hiraide; Michiaki Emori


Publisher
John Wiley and Sons
Year
2007
Tongue
English
Weight
480 KB
Volume
90
Category
Article
ISSN
8756-663X

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✦ Synopsis


Abstract

It is common to use ATPG of scan‐based design for high fault coverage in LSI testing. However, significant increases in test cost arise with increasing design complexity. Recent strategies for test cost reduction combine ATPG and BIST techniques. Unfortunately, these strategies have serious constraints. We propose a new method that employs ATE and BIST structures to apply coded test patterns to LSI circuits. Results obtained using practical circuits show drastic test cost reduction capability of the proposed method. © 2007 Wiley Periodicals, Inc. Electron Comm Jpn Pt 2, 90(5): 58– 65, 2007; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/ecjb.20356