Modeling, Analysis and Optimization of Network-on-Chip Communication Architectures

✍ Scribed by Umit Y. Ogras, Radu Marculescu (auth.)

Publisher: Springer Netherlands
Year: 2013
Tongue: English
Leaves: 181
Series: Lecture Notes in Electrical Engineering 184
Edition: 1
Category: Library

No coin nor oath required. For personal study only.

✦ Synopsis

Traditionally, design space exploration for Systems-on-Chip (SoCs) has focused on the computational aspects of the problem at hand. However, as the number of components on a single chip and their performance continue to increase, the communication architecture plays a major role in the area, performance and energy consumption of the overall system. As a result, a shift from computation-based to communication-based design becomes mandatory. Towards this end, network-on-chip (NoC) communication architectures have emerged recently as a promising alternative to classical bus and point-to-point communication architectures.

In this dissertation, we study outstanding research problems related to modeling, analysis and optimization of NoC communication architectures. More precisely, we present novel design methodologies, software tools and FPGA prototypes to aid the design of application-specific NoCs.

✦ Table of Contents

Front Matter....Pages i-xiv
Introduction....Pages 1-8
Literature Survey....Pages 9-32
Motivational Example: MPEG-2 Encoder Design....Pages 33-37
Target NoC Platform....Pages 39-47
NoC Performance Analysis....Pages 49-74
Application-Specific NoC Architecture Customization Using Long-Range Links....Pages 75-103
Analysis and Optimization of Prediction-Based Flow Control in Networks-on-Chip....Pages 105-133
Design and Management of VFI Partitioned Networks-on-Chip....Pages 135-154
Conclusion....Pages 155-155
Back Matter....Pages 157-174

✦ Subjects

Circuits and Systems; Processor Architectures

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