Intended for both engineers and managers who are given the task of selecting an architecture or design approach, this book examines the developments of Motorola's CISC, RISC and DSP processors. It describes the typical system configurations and engineering trade-offs that are made. The text provides
Microprocessor Architectures. RISC, CISC and DSP
β Scribed by Steve Heath (Auth.)
- Publisher
- Elsevier Ltd, Newnes
- Year
- 1995
- Tongue
- English
- Leaves
- 403
- Edition
- 2
- Category
- Library
No coin nor oath required. For personal study only.
β¦ Synopsis
'Why are there all these different processor architectures and what do they all mean? Which processor will I use? How should I choose it?' Given the task of selecting an architecture or design approach, both engineers and managers require a knowledge of the whole system and an explanation of the design tradeoffs and their effects. This is information that rarely appears in data sheets or user manuals. This book fills that knowledge gap.
Section 1 provides a primer and history of the three basic microprocessor architectures. Section 2 describes the ways in which the architectures react with the system. Section 3 looks at some more commercial aspects such as semiconductor technology, the design cycle, and selection criteria. The appendices provide benchmarking data and binary compatibility standards. Since the first edition of this book was published, much has happened within the industry. The Power PC architecture has appeared and RISC has become a more significant challenger to CISC. The book now includes new material on Power PC, and a complete chapter devoted to understanding the RISC challenge. The examples used in the text have been based on Motorola microprocessor families, but the system considerations are also applicable to other processors. For this reason comparisons to other designs have been included, and an overview of other processors including the Intel 80x86 and Pentium, DEC Alpha, SUN Sparc, and MIPS range has been given. Steve Heath has been involved in the design and development of microprocessor based systems since 1982. These designs have included VMEbus systems, microcontrollers, IBM PCs, Apple Macintoshes, and both CISC and RISC based multiprocessor systems, while using operating systems as varied as MS-DOS, UNIX, Macintosh OS and real time kernels. An avid user of computer systems, he has written numerous articles and papers for the electronics press, as well as books from Butterworth-Heinemann including VMEbus: A Practical Companion; PowerPC: A Practical Companion; MAC User's Pocket Book; UNIX Pocket Book; Upgrading Your PC Pocket Book; Upgrading Your MAC Pocket Book; and Effective PC Networking.
β¦ Table of Contents
Content:
By the same author, Page ii
Front Matter, Page iii
Copyright, Page iv
Preface, Pages xiii-xiv
Acknowledgements, Page xv
1 - Complex instruction set computers, Pages 1-46
2 - 32 bit CISC processors, Pages 47-76
3 - The RISC challenge, Pages 77-103
4 - RISC wars, Pages 104-147
5 - Digital signal processors, Pages 148-171
6 - Memory, memory management and caches, Pages 172-223
7 - Real-time software, interrupts and exceptions, Pages 224-247
8 - Multiprocessing, Pages 248-263
9 - Application examples, Pages 264-294
10 - Semiconductor technology, Pages 295-305
11 - The changing design cycle, Pages 306-326
12 - The next generations, Pages 327-337
13 - Selecting a microprocessor architecture, Pages 338-345
A - βLies, damn lies and benchmarksβ, Pages 346-351
B - Alternative microprocessor architectures, Pages 352-381
Index, Pages 383-398
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