Microelectronic Circuit Design

✍ Scribed by Richard C. Jaeger, Travis N. Blalock, Benjamin J. Blalock

• Publisher: McGraw-Hill
• Year: 2023
• Tongue: English
• Leaves: 1405
• Edition: 6
• Category: Library

✦ Table of Contents

Cover
Title Page
Copyright Page
Dedications
Brief Contents
Contents
Preface
Chapter-by-Chapter Summary
PART ONE SOLID-STATE ELECTRONICS AND DEVICES
CHAPTER 1 INTRODUCTION TO ELECTRONICS
1.1 A Brief History of Electronics: From Vacuum Tubes to Giga-Scale Integration
1.2 Classification of Electronic Signals
1.2.1 Digital Signals
1.2.2 Analog Signals
1.2.3 A/D and D/A Converters—Bridging
the Analog and Digital Domains
1.3 Notational Conventions
1.4 Problem-Solving Approach
1.5 Important Concepts from Circuit Theory
1.5.1 Voltage and Current Division
1.5.2 Thévenin and Norton Circuit
Representations
1.6 Frequency Spectrum of Electronic Signals
1.7 Amplifiers
1.7.1 Ideal Operational Amplifiers
1.7.2 Amplifier Frequency Response
1.8 Element Variations in Circuit Design
1.8.1 Mathematical Modeling of
Tolerances
1.8.2 Worst-Case Analysis
1.8.3 Monte Carlo Analysis
1.8.4 Temperature Coefficients
1.9 Numeric Precision
Summary
Key Terms
References
Additional Reading
Problems
CHAPTER 2 SOLID-STATE ELECTRONICS
2.1 Solid-State Electronic Materials
2.2 Covalent Bond Model
2.3 Drift Currents and Mobility in
Semiconductors
2.3.1 Drift Currents
2.3.2 Mobility
2.3.3 Velocity Saturation
2.4 Resistivity of Intrinsic Silicon
2.5 Impurities in Semiconductors
2.5.1 Donor Impurities in Silicon
2.5.2 Acceptor Impurities in Silicon
2.6 Electron and Hole Concentrations in Doped
Semiconductors
2.6.1 n-Type Material (ND > NA)
2.6.2 p-Type Material (NA > ND)
2.7 Mobility and Resistivity in Doped
Semiconductors
2.8 Diffusion Currents
2.9 Total Current
2.10 Energy Band Model
2.10.1 Electron—Hole Pair Generation in an
Intrinsic Semiconductor
2.10.2 Energy Band Model for a Doped
Semiconductor
2.10.3 Compensated Semiconductors
2.11 Overview of Integrated Circuit Fabrication
Summary
Key Terms
Additional Reading
Problems
CHAPTER 3 SOLID-STATE DIODES AND DIODE CIRCUITS
3.1 The pn Junction Diode
3.1.1 pn Junction Electrostatics
3.1.2 Internal Diode Currents
3.2 The i-v Characteristics of the Diode
3.3 The Diode Equation: A Mathematical
Model for the Diode
3.4 Diode Characteristics Under Reverse, Zero, and
Forward Bias
3.4.1 Reverse Bias
3.4.2 Zero Bias
3.4.3 Forward Bias
3.5 Diode Temperature Coefficient
3.6 Diodes Under Reverse Bias
3.6.1 Saturation Current in Real Diodes
3.6.2 Reverse Breakdown
3.6.3 Diode Model for the Breakdown
Region
3.7 pn Junction Capacitance
3.7.1 Reverse Bias
3.7.2 Forward Bias
3.8 Schottky Barrier Diode
3.9 SPICE Model and Layout for a Diode
3.9.1 Diode Layout
3.10 Diode Circuit Analysis
3.10.1 Load-Line Analysis
3.10.2 Analysis Using the Mathematical Model
for the Diode
3.10.3 The Ideal Diode Model
3.10.4 Constant Voltage Drop Model
3.10.5 Model Comparison and Discussion
3.11 Multiple-Diode Circuits
3.12 Analysis of Diodes Operating in the
Breakdown Region
3.12.1 Load-Line Analysis
3.12.2 Analysis with the Piecewise
Linear Model
3.12.3 Voltage Regulation
3.12.4 Analysis Including Zener
Resistance
3.12.5 Line and Load Regulation
3.13 Half-Wave Rectifier Circuits
3.13.1 Half-Wave Rectifier with Resistor
Load
3.13.2 Rectifier Filter Capacitor
3.13.3 Half-Wave Rectifier with RC Load
3.13.4 Ripple Voltage and Conduction
Interval
3.13.5 Diode Current
3.13.6 Surge Current
3.13.7 Peak-Inverse-Voltage (PIV) Rating
3.13.8 Diode Power Dissipation
3.13.9 Half-Wave Rectifier with Negative
Output Voltage
3.14 Full-Wave Rectifier Circuits
3.14.1 Full-Wave Rectifier with Negative
Output Voltage
3.15 Full-Wave Bridge Rectification
3.16 Rectifier Comparison and Design Tradeoffs
3.17 Dynamic Switching Behavior of the Diode
3.18 Photo Diodes, Solar Cells, and
Light-Emitting Diodes
3.18.1 Photo Diodes and Photodetectors
3.18.2 Power Generation from Solar Cells
3.18.3 Light-Emitting Diodes (LEDs)
Summary
Key Terms
Reference
Additional Reading
Problems
CHAPTER 4 BIPOLAR JUNCTION TRANSISTORS
4.1 Physical Structure of the Bipolar Transistor
4.2 The Transport Model for the npn Transistor
4.2.1 Forward Characteristics
4.2.2 Reverse Characteristics
4.2.3 Complete Transport Model Equations
for Arbitrary Bias Conditions
4.3 The pnp Transistor
4.4 Equivalent Circuit Representations for the
Transport Models
4.4.1 Another Look at the Forward-Active
Region
4.5 The i-v Characteristics of the Bipolar
Transistor
4.5.1 Output Characteristics
4.5.2 Transfer Characteristics
4.6 The Operating Regions of the Bipolar
Transistor
4.7 Transport Model Simplifications
4.7.1 Simplified Model for the Cutoff
Region
4.7.2 Model Simplifications for the Forward-Active Region
4.7.3 Diodes in Bipolar Integrated Circuits
4.7.4 Simplified Model for the Reverse-Active Region
4.7.5 Modeling Operation in the Saturation Region
4.8 Nonideal Behavior of the Bipolar Transistor
4.8.1 Junction Breakdown Voltages
4.8.2 Minority-Carrier Transport in the
Base Region
4.8.3 Base Transit Time
4.8.4 Diffusion Capacitance
4.8.5 Frequency Dependence of the
Common-Emitter Current Gain
4.8.6 The Early Effect and Early Voltage
4.8.7 Modeling the Early Effect
4.8.8 Origin of the Early Effect
4.9 Transconductance
4.10 Bipolar Technology and SPICE Model
4.10.1 Qualitative Description
4.10.2 Spice Model Equations
4.10.3 High-Performance Bipolar
Transistors
4.11 Practical Bias Circuits for the BJT
4.11.1 Four-Resistor Bias Network
4.11.2 Design Objectives for the Four-Resistor Bias Network
4.11.3 Iterative Analysis of the Four-Resistor
Bias Circuit
4.12 Tolerances in Bias Circuits
4.12.1 Worst-Case Analysis
4.12.2 Monte Carlo Analysis
Summary
Key Terms
References
Additional Readings
Problems
CHAPTER 5 FIELD-EFFECT TRANSISTORS
5.1 Characteristics of the MOS Capacitor
5.1.1 Accumulation Region
5.1.2 Depletion Region
5.1.3 Inversion Region
5.2 The NMOS Transistor
5.2.1 Qualitative i-v Behavior of the NMOS
Transistor
5.2.2 Triode Region Characteristics of the
NMOS Transistor
5.2.3 On Resistance
5.2.4 Transconductance
5.2.5 Saturation of the i-v Characteristics
5.2.6 Mathematical Model in the Saturation
(Pinch-Off) Region
5.2.7 Transconductance in Saturation
5.2.8 Transconductance Efficiency in
Saturation
5.2.9 Channel-Length Modulation
5.2.10 Transfer Characteristics and
Depletion-Mode MOSFETs
5.2.11 Body Effect or Substrate
Sensitivity
5.3 PMOS Transistors
5.4 MOSFET Circuit Symbols
5.5 MOS Transistor Symmetry
5.5.1 The One-Transistor Dram Cell
5.5.2 Data Storage in the 1-T Cell
5.5.3 Reading Data from the 1-T Cell
5.6 CMOS Technology
5.6.1 CMOS Voltage Transfer
Characteristics
5.7 CMOS Latchup
5.8 Capacitances in MOS Transistors
5.8.1 NMOS Transistor Capacitances in the
Triode Region
5.8.2 Capacitances in the Saturation
Region
5.8.3 Capacitances in Cutoff
5.9 MOSFET Modeling in SPICE
5.10 MOS Transistor Scaling
5.10.1 Drain Current
5.10.2 Gate Capacitance
5.10.3 Circuit and Power Densities
5.10.4 Power-Delay Product
5.10.5 Cutoff Frequency
5.10.6 High Field Limitations
5.10.7 The Unified MOS Transistor Model,
Including High Field Limitations
5.10.8 Subthreshold Conduction
5.11 All Region Modeling
5.11.1 Interpolation Model
5.11.2 Interpolation Model in the Saturation
Region
5.11.3 Transconductance Efficiency
5.12 MOS Transistor Fabrication and Layout
Design Rules
5.12.1 Minimum Feature Size and
Alignment Tolerance
5.12.2 MOS Transistor Layout
5.12.3 CMOS Inverter Layout
5.13 Advanced CMOS Technologies
5.14 Biasing the NMOS Field-Effect Transistor
5.14.1 Why Do We Need Bias
5.14.2 Four-Resistor Biasing
5.14.3 Constant Gate-Source Voltage Bias
5.14.4 Graphical Analysis for the Q-Point
5.14.5 Analysis Including Body Effect
5.14.6 Analysis Using the Unified Model
5.14.7 NMOS Circuit Analysis Comparisons
5.14.8 Two-Resistor Bias
5.15 Biasing the PMOS Field-Effect Transistor
5.16 Biasing the CMOS Inverter as an Amplifier
5.17 The CMOS Transmission Gate
5.18 The Junction Field-Effect Transistor (JFET
5.18.1 The JFET with Bias Applied
5.18.2 JFET Channel with Drain-Source Bias
5.18.3 n-Channel JFET i-v Characteristics
5.18.4 The p-Channel JFET
5.18.5 Circuit Symbols and JFET Model
Summary
5.18.6 JFET Capacitances
5.19 JFET Modeling in SPICE
5.20 Biasing the JFET and Depletion-
Mode MOSFET
Summary
Key Terms
References
Additional Readings
Problems
PART TWO ANALOG ELECTRONICS
CHAPTER 6 INTRODUCTION TO AMPLIFIERS
6.1 An Example of an Analog Electronic System
6.2 Amplification
6.2.1 Voltage Gain
6.2.2 Current Gain
6.2.3 Power Gain
6.2.4 Location of the Amplifier
6.2.5 The Decibel Scale
6.3 Two-Port Models for Amplifiers
6.3.1 The g-Parameters
6.4 Mismatched Source and Load
Resistances
6.5 The Differential Amplifier
6.5.1 Differential Amplifier Voltage Transfer
Characteristic
6.5.2 Voltage Gain
6.6 Distortion in Amplifiers
6.7 Differential Amplifier Model
6.8 Amplifier Frequency Response
6.8.1 Bode Plots
6.8.2 The Low-Pass Amplifier
6.8.3 The High-Pass Amplifier
6.8.4 Band-Pass Amplifiers
Summary
Key Terms
References
Additional Reading
Problems
CHAPTER 7 THE TRANSISTOR AS AN AMPLIFIER
7.1 The Transistor as an Amplifier
7.1.1 The BJT Amplifier
7.1.2 The MOSFET Amplifier
7.2 Coupling and Bypass Capacitors
7.3 Circuit Analysis Using dc and ac
Equivalent Circuits
7.3.1 Menu for dc and ac Analysis
7.4 Introduction to Small-Signal Modeling
7.4.1 Graphical Interpretation of the Small-
Signal Behavior of the Diode
7.4.2 Small-Signal Modeling of the Diode
7.5 Small-Signal Models for Bipolar
Junction Transistors
7.5.1 The Hybrid-Pi Model
7.5.2 Graphical Interpretation of the
Transconductance
7.5.3 Small-Signal Current Gain
7.5.4 The Intrinsic Voltage Gain
of the BJT
7.5.5 Equivalent Forms of the Small-Signal
Model
7.5.6 Simplified Hybrid-Pi Model
7.5.7 Definition of a Small Signal for the
Bipolar Transistor
7.5.8 Small-Signal Model for the pnp
Transistor
7.5.9 ac Analysis versus Transient Analysis
in SPICE
7.6 The Common-Emitter (C-E) Amplifier
7.6.1 Terminal Voltage Gain
7.6.2 Input Resistance
7.6.3 Signal Source Voltage Gain
7.7 Important Limits and Model Simplifications
7.7.1 A Design Guide for the
Common-Emitter Amplifier
7.7.2 Upper Bound on the
Common-Emitter Gain
7.7.3 Small-Signal Limit for the Common-Emitter Amplifier
7.8 Small-Signal Models for Field-Effect
Transistors
7.8.1 Small-Signal Model for
the MOSFET
7.8.2 Intrinsic Voltage Gain of
the MOSFET
7.8.3 Definition of Small-Signal Operation for
the MOSFET
7.8.4 Body Effect in the Four-Terminal
MOSFET
7.8.5 Small-Signal Model for the PMOS
Transistor
7.8.6 Small-Signal Modeling for MOS
Transistors in Weak Inversion
7.8.7 Small-Signal Model for the Junction
Field-Effect Transistor
7.9 Summary and Comparison of the Small-Signal
Models of the BJT and FET
7.10 The Common-Source (C-S) Amplifier
7.10.1 Common-Source Terminal Voltage
Gain
7.10.2 Signal Source Voltage Gain for the
Common-Source Amplifier
7.10.3 A Design Guide for the Common-Source
Amplifier
7.10.4 Small-Signal Limit for the Common-
Source Amplifier
7.10.5 Input Resistances of the Common-
Emitter and Common-Source
Amplifiers
7.10.6 Common-Emitter and Common-Source
Output Resistances
7.10.7 Comparison of the Three Amplifier
Examples
7.11 Common-Emitter and Common-Source
Amplifier Summary
7.11.1 Guidelines for Neglecting the Transistor
Output Resistance
7.12 Amplifier Power and Signal Range
7.12.1 Power Dissipation
7.12.2 Signal Range
Summary
Key Terms
Reference
Problems
CHAPTER 8 TRANSISTOR AMPLIFIER BUILDING BLOCKS
8.1 Amplifier Classification
8.1.1 Signal Injection and Extraction—The BJT
8.1.2 Signal Injection and Extraction—The FET
8.1.3 Common-Emitter (C-E) and Common-Source (C-S) Amplifiers
8.1.4 Common-Collector (C-C) and Common-Drain (C-D) Topologies
8.1.5 Common-Base (C-B) and Common-Gate
(C-G) Amplifiers
8.1.6 Small-Signal Model Review
8.2 Inverting Amplifiers—Common-Emitter
and Common-Source Circuits
8.2.1 The Common-Emitter (C-E) Amplifier
8.2.2 Common-Emitter Example
Comparison
8.2.3 The Common-Source Amplifier
8.2.4 Small-Signal Limit for the Common-Source Amplifier
8.2.5 Common-Emitter and Common-Source
Amplifier Characteristics
8.2.6 C-E/C-S Amplifier Summary
8.2.7 Equivalent Transistor Representation of
the Generalized C-E/C-S Transistor
8.3 Follower Circuits—Common-Collector
and Common-Drain Amplifiers
8.3.1 Terminal Voltage Gain
8.3.2 Input Resistance
8.3.3 Signal Source Voltage Gain
8.3.4 Follower Signal Range
8.3.5 Follower Output Resistance
8.3.6 Current Gain
8.3.7 C-C/C-D Amplifier Summary
8.4 Noninverting Amplifiers—Common-Base
and Common-Gate Circuits
8.4.1 Terminal Voltage Gain and Input
Resistance
8.4.2 Signal Source Voltage Gain
8.4.3 Input Signal Range
8.4.4 Resistance at the Collector and Drain
Terminals
8.4.5 Current Gain
8.4.6 Overall Input and Output Resistances
for the Noninverting Amplifiers
8.4.7 C-B/C-G Amplifier Summary
8.5 Amplifier Prototype Review and Comparison
8.5.1 The BJT Amplifiers
8.5.2 The FET Amplifiers
8.6 Common-Source Amplifiers Using
MOS Transistor Loads
8.6.1 Voltage Gain Estimate
8.6.2 Detailed Analysis
8.6.3 Alternative Loads
8.6.4 Input and Output Resistances
8.7 Coupling and Bypass Capacitor Design
8.7.1 Common-Emitter and Common-Source
Amplifiers
8.7.2 Common-Collector and Common-Drain
Amplifiers
8.7.3 Common-Base and Common-Gate
Amplifiers
8.7.4 Setting Lower Cutoff Frequency fL
8.8 Amplifier Design Examples
8.8.1 Monte Carlo Evaluation of the Common-
Base Amplifier Design
8.9 Multistage ac-Coupled Amplifiers
8.9.1 A Three-Stage ac-Coupled
Amplifier
8.9.2 Voltage Gain
8.9.3 Input Resistance
8.9.4 Signal Source Voltage Gain
8.9.5 Output Resistance
8.9.6 Current and Power Gain
8.9.7 Input Signal Range
8.9.8 Estimating the Lower Cutoff Frequency
of the Multistage Amplifier
8.10 Introduction to dc-Coupled
Amplifiers
8.10.1 A dc-Coupled Three-Stage
Amplifier
8.10.2 Two Transistor dc-Coupled
Amplifiers
Summary
Key Terms
Additional Reading
Problems
CHAPTER 9 AMPLIFIER FREQUENCY RESPONSE
9.1 Amplifier Frequency Response
9.1.1 Low-Frequency Response
9.1.2 Estimating ωL in the Absence of a Dominant Pole
9.1.3 High-Frequency Response
9.1.4 Estimating ωH in the Absence of a Dominant Pole
9.2 Direct Determination of the Low-Frequency
Poles and Zeros—The Common-Source
Amplifier
9.3 Estimation of ωL Using the Short-Circuit Time-Constant Method
9.3.1 Estimate of ωL for the Common-Emitter Amplifier
9.3.2 Estimate of ωL for the Common-Source Amplifier
9.3.3 Estimate of ωL for the Common-Base Amplifier
9.3.4 Estimate of ωL for the Common-Gate Amplifier
9.3.5 Estimate of ωL for the Common- Collector Amplifier
9.3.6 Estimate of ωL for the Common-Drain Amplifier
9.4 Transistor Models at High Frequencies
9.4.1 Frequency-Dependent Hybrid-Pi Model
for the Bipolar Transistor
9.4.2 Modeling Cp and Cµ in SPICE
9.4.3 Unity-Gain Frequency fT
9.4.4 High-Frequency Model for
the FET
9.4.5 Modeling C G S and C G D in SPICE
9.4.6 Channel Length Dependence
of fT
9.4.7 Limitations of the High-Frequency
Models
9.5 Base and Gate Resistances in the
Small-Signal Models
9.5.1 Effect of Base and Gate Resistances on
Midband Amplifiers
9.6 High-Frequency Common-Emitter and
Common-Source Amplifier Analysis
9.6.1 The Miller Effect
9.6.2 Common-Emitter and Common-
Source Amplifier High-Frequency
Response
9.6.3 Direct Analysis of the Common-Emitter
Transfer Characteristic
9.6.4 Poles of the Common-Emitter
Amplifier
9.6.5 Dominant Pole for the Common-Source
Amplifier
9.6.6 Estimation of . H Using the Open-Circuit
Time-Constant Method
9.6.7 Common-Source Amplifier
with Source Degeneration
Resistance
9.6.8 Poles of the Common-Emitter with
Emitter Degeneration
Resistance
9.7 Common-Base and Common-Gate
Amplifier High-Frequency
Response
9.8 Common-Collector and Common-Drain
Amplifier High-Frequency
Response
9.9 Single-Stage Amplifier High-Frequency
Response Summary
9.9.1 Amplifier Gain-Bandwidth (GBW)
Limitations
9.10 Frequency Response of Multistage
Amplifiers
9.10.1 Differential Amplifier
9.10.2 The Common-Collector/
Common-Base Cascade
9.10.3 High-Frequency Response of the
Cascode Amplifier
9.10.4 Cutoff Frequency for the Current
Mirror
9.10.5 Three-Stage Amplifier Example
9.11 Introduction to Radio Frequency
Circuits
9.11.1 Radio Frequency Amplifiers
9.11.2 The Shunt-Peaked Amplifier
9.11.3 Single-Tuned Amplifier
9.11.4 Use of a Tapped Inductor—the Auto
Transformer
9.11.5 Multiple Tuned Circuits—Synchronous
and Stagger Tuning
9.11.6 Common-Source Amplifier with
Inductive Degeneration
9.12 Mixers and Balanced Modulators
9.12.1 Introduction to Mixer Operation
9.12.2 A Single-Balanced Mixer
9.12.3 The Differential Pair as a Single-Balanced Mixer
9.12.4 A Double-Balanced Mixer
9.12.5 The Jones Mixer—a Double-Balanced
Mixer/Modulator
Summary
Key Terms
References
Problems
PART THREE OPERATIONAL AMPLIFIERS AND FEEDBACK
CHAPTER 10 IDEAL OPERATIONAL AMPLIFIERS
10.1 Ideal Differential and Operational
Amplifiers
10.1.1 Assumptions for Ideal Operational
Amplifier Analysis
10.2 Analysis of Circuits Containing Ideal
Operational Amplifiers
10.2.1 The Inverting Amplifier
10.2.2 The Transresistance Amplifier—a
Current-to-Voltage Converter
10.2.3 The Noninverting Amplifier
10.2.4 The Unity-Gain Buffer, or Voltage
Follower
10.2.5 The Summing Amplifier
10.2.6 The Difference Amplifier
10.3 Frequency Dependent Feedback
10.3.1 An Active Low-Pass Filter
10.3.2 An Active High-Pass Filter
10.3.3 The Integrator
10.3.4 The Differentiator
Summary
Key Terms
References
Additional Reading
Problems
CHAPTER 11 NONIDEAL OPERATIONAL AMPLIFIERS AND FEEDBACK AMPLIFIER STABILITY
11.1 Classic Feedback Systems
11.1.1 Closed-Loop Gain Analysis
11.1.2 Gain Error
11.2 Analysis of Circuits Containing Nonideal
Operational Amplifiers
11.2.1 Finite Open-Loop Gain
11.2.2 Nonzero Output Resistance
11.2.3 Finite Input Resistance
11.2.4 Summary of Nonideal Inverting and
Noninverting Amplifiers
11.3 Series and Shunt Feedback Circuits
11.3.1 Feedback Amplifier Categories
11.3.2 Voltage Amplifiers—Series-Shunt
Feedback
11.3.3 Transimpedance Amplifiers—Shunt-Shunt Feedback
11.3.4 Current Amplifiers—Shunt-Series
Feedback
11.3.5 Transconductance Amplifiers—Series-Series Feedback
11.4 Unified Approach to Feedback Amplifier Gain
Calculations
11.4.1 Closed-Loop Gain Analysis
11.4.2 Resistance Calculations Using
Blackman’s Theorem
11.5 Series-Shunt Feedback—Voltage Amplifiers
11.5.1 Closed-Loop Gain Calculation
11.5.2 Input Resistance Calculations
11.5.3 Output Resistance Calculations
11.5.4 Series-Shunt Feedback Amplifier
Summary
11.6 Shunt-Shunt Feedback—Transresistance
Amplifiers
11.6.1 Closed-Loop Gain Calculation
11.6.2 Input Resistance Calculations
11.6.3 Output Resistance Calculations
11.6.4 Shunt-Shunt Feedback Amplifier
Summary
11.7 Series-Series Feedback—Transconductance
Amplifiers
11.7.1 Closed-Loop Gain Calculation
11.7.2 Input Resistance Calculation
11.7.3 Output Resistance Calculation
11.7.4 Series-Series Feedback Amplifier
Summary
11.8 Shunt-Series Feedback—Current Amplifiers
11.8.1 Closed-Loop Gain Calculation
11.8.2 Input Resistance Calculation
11.8.3 Output Resistance Calculation
11.8.4 Shunt-Series Feedback Amplifier
Summary
11.9 Finding the Loop Gain Using Successive
Voltage and Current Injection
11.9.1 Simplifications
11.10 Distortion Reduction through the Use of
Feedback
11.11 DC Error Sources and Output Range
Limitations
11.11.1 Input-Offset Voltage
11.11.2 Offset-Voltage Adjustment
11.11.3 Input-Bias and Offset Currents
11.11.4 Output Voltage and
Current Limits
11.12 Common-Mode Rejection and Input
Resistance
11.12.1 Finite Common-Mode Rejection
Ratio
11.12.2 Why Is CMRR Important
11.12.3 Voltage-Follower Gain Error Due to
CMRR
11.12.4 Common-Mode Input Resistance
11.12.5 An Alternate Interpretation of CMRR
11.12.6 Power Supply Rejection Ratio
11.13 Frequency Response and Bandwidth of
Operational Amplifiers
11.13.1 Frequency Response of the
Noninverting Amplifier
11.13.2 Inverting Amplifier Frequency
Response
11.13.3 Using Feedback to Control Frequency
Response
11.13.4 Large-Signal Limitations—Slew Rate
and Full-Power Bandwidth
11.13.5 Macro Model for Operational Amplifier
Frequency Response
11.13.6 Complete Op Amp Macro Models
in SPICE
11.13.7 Examples of Commercial General-Purpose Operational Amplifiers
11.14 Stability of Feedback Amplifiers
11.14.1 The Nyquist Plot
11.14.2 First-Order Systems
11.14.3 Second-Order Systems and Phase
Margin
11.14.4 Step Response and Phase Margin
11.14.5 Third-Order Systems and Gain
Margin
11.14.6 Determining Stability from the Bode
Plot
Summary
Key Terms
References
Problems
CHAPTER 12 OPERATIONAL AMPLIFIER APPLICATIONS
12.1 Cascaded Amplifiers
12.1.1 Two-Port Representations
12.1.2 Amplifier Terminology Review
12.1.3 Frequency Response of Cascaded
Amplifiers
12.2 The Instrumentation Amplifier
12.3 Active Filters
12.3.1 Low-Pass Filter
12.3.2 A High-Pass Filter with Gain
12.3.3 Band-Pass Filter
12.3.4 Sensitivity
12.3.5 Magnitude and Frequency Scaling
12.4 Switched-Capacitor Circuits
12.4.1 A Switched-Capacitor Integrator
12.4.2 Noninverting SC Integrator
12.4.3 Switched-Capacitor Filters
12.5 Digital-to-Analog Conversion
12.5.1 D/A Converter Fundamentals
12.5.2 D/A Converter Errors
12.5.3 Digital-to-Analog Converter Circuits
12.6 Analog-to-Digital Conversion
12.6.1 A/D Converter Fundamentals
12.6.2 Analog-to-Digital Converter Errors
12.6.3 Basic A/D Conversion Techniques
12.7 Oscillators
12.7.1 The Barkhausen Criteria for
Oscillation
12.7.2 Oscillators Employing Frequency-Selective RC Networks
12.8 Nonlinear Circuit Applications
12.8.1 A Precision Half-Wave Rectifier
12.8.2 Nonsaturating Precision-Rectifier
Circuit
12.9 Circuits Using Positive Feedback
12.9.1 The Comparator and Schmitt
Trigger
12.9.2 The Astable Multivibrator
12.9.3 The Monostable Multivibrator or One
Shot
Summary
Key Terms
Additional Reading
Problems
CHAPTER 13 DIFFERENTIAL AMPLIFIERS AND OPERATIONAL AMPLIFIER DESIGN
13.1 Differential Amplifiers
13.1.1 Bipolar and MOS Differential
Amplifiers
13.1.2 dc Analysis of the Bipolar Differential
Amplifier
13.1.3 Transfer Characteristic for the Bipolar
Differential Amplifier
13.1.4 ac Analysis of the Bipolar Differential
Amplifier
13.1.5 Differential-Mode Gain and Input and
Output Resistances
13.1.6 Common-Mode Gain and Input
Resistance
13.1.7 Common-Mode Rejection Ratio
(CMRR
13.1.8 Analysis Using Differential- and
Common-Mode Half-Circuits
13.1.9 Biasing with Electronic Current
Sources
13.1.10 Modeling the Electronic Current Source
in SPICE
13.1.11 dc Analysis of the MOSFET
Differential Amplifier
13.1.12 Differential-Mode Input Signals
13.1.13 Small-Signal Transfer Characteristic for
the MOS Differential Amplifier
13.1.14 Common-Mode Input Signals
13.1.15 Model for Differential Pairs
13.2 Evolution to Basic Operational Amplifiers
13.2.1 A Two-Stage Prototype for an
Operational Amplifier
13.2.2 Improving the Op Amp Voltage
Gain
13.2.3 Darlington Pairs
13.2.4 Output Resistance Reduction
13.2.5 A CMOS Operational Amplifier
Prototype
13.2.6 BiCMOS Amplifiers
13.2.7 All Transistor Implementations
13.3 Output Stages
13.3.1 The Source Follower—a Class-A Output
Stage
13.3.2 Efficiency of Class-A Amplifiers
13.3.3 Class-B Push-Pull Output Stage
13.3.4 Class-AB Amplifiers
13.3.5 Class-AB Output Stages for
Operational Amplifiers
13.3.6 Short-Circuit Protection
13.3.7 Transformer Coupling
13.4 Electronic Current Sources
13.4.1 Single-Transistor Current
Sources
13.4.2 Figure of Merit for Current
Sources
13.4.3 Higher Output Resistance
Sources
13.4.4 Current Source Design Examples
Summary
Key Terms
References
Additional Reading
Problems
CHAPTER 14 ANALOG INTEGRATED CIRCUIT DESIGN TECHNIQUES
14.1 Circuit Element Matching
14.2 Current Mirrors
14.2.1 dc Analysis of the MOS Transistor
Current Mirror
14.2.2 Changing the MOS Mirror Ratio
14.2.3 dc Analysis of the Bipolar Transistor
Current Mirror
14.2.4 Altering the BJT Current Mirror
Ratio
14.2.5 Multiple Current Sources
14.2.6 Buffered Current Mirror
14.2.7 Output Resistance of the Current
Mirrors
14.2.8 Two-Port Model for the Current
Mirror
14.2.9 The Widlar Current Source
14.2.10 The MOS Version of the Widlar
Source
14.2.11 MOS Widlar Source in Weak
Inversion
14.3 High-Output-Resistance Current
Mirrors
14.3.1 The Wilson Current Sources
14.3.2 Output Resistance of the Wilson
Source
14.3.3 Cascode Current Sources
14.3.4 Output Resistance of the Cascode
Sources
14.3.5 Regulated Cascode Current Source
14.3.6 Current Mirror Summary
14.4 Reference Current Generation
14.5 Supply-Independent Biasing
14.5.1 A V BE -Based Reference
14.5.2 The Widlar Source
14.5.3 Power-Supply-Independent Bias
Cell
14.5.4 A Supply-Independent MOS
Reference Cell
14.6 The Bandgap Reference
14.7 The Current Mirror as an Active Load
14.7.1 CMOS Differential Amplifier with
Active Load
14.7.2 Bipolar Differential Amplifier with
Active Load
14.8 Active Loads in Operational Amplifiers
14.8.1 CMOS Op-Amp Voltage Gain
14.8.2 dc Design Considerations
14.8.3 Bipolar Operational Amplifiers
14.8.4 Input Stage Breakdown
14.9 The µA741 Operational Amplifier
14.9.1 Overall Circuit Operation
14.9.2 Bias Circuitry
14.9.3 dc Analysis of the 741 Input Stage
14.9.4 ac Analysis of the 741 Input Stage
14.9.5 Voltage Gain of the Complete
Amplifier
14.9.6 The 741 Output Stage
14.9.7 Output Resistance
14.9.8 Short-Circuit Protection
14.9.9 Summary of the µA741 Operational
Amplifier Characteristics
14.10 The Gilbert Analog Multiplier
Summary
Key Terms
References
Additional Readings
Problems
CHAPTER 15 TRANSISTOR FEEDBACK AMPLIFIERS AND OSCILLATORS
15.1 Basic Feedback System Review
15.1.1 Closed-Loop Gain
15.1.2 Closed-Loop Impedances
15.1.3 Feedback Effects
15.2 Feedback Amplifier Analysis at Midband
15.2.1 Closed-Loop Gain
15.2.2 Input Resistance
15.2.3 Output Resistance
15.2.4 Offset Voltage Calculation
15.3 Feedback Amplifier Circuit Examples
15.3.1 Series-Shunt Feedback—Voltage
Amplifiers
15.3.2 Differential Input Series-Shunt Voltage
Amplifier
15.3.3 Shunt-Shunt Feedback—Transresistance
Amplifiers
15.3.4 Series-Series Feedback—Transconductance Amplifiers
15.3.5 Shunt-Series Feedback—Current
Amplifiers
15.4 Review of Feedback Amplifier Stability
15.4.1 Closed-Loop Response of the
Uncompensated Amplifier
15.4.2 Phase Margin
15.4.3 Higher-Order Effects
15.4.4 Response of the Compensated
Amplifier
15.4.5 Small-Signal Limitations
15.5 Single-Pole Operational Amplifier
Compensation
15.5.1 Three-Stage Op-Amp Analysis
15.5.2 Transmission Zeros in FET Op
Amps
15.5.3 Bipolar Amplifier Compensation
15.5.4 Slew Rate of the Operational
Amplifier
15.5.5 Relationships between Slew
Rate and Gain-Bandwidth
Product
15.6 High-Frequency Oscillators
15.6.1 The Colpitts Oscillator
15.6.2 The Hartley Oscillator
15.6.3 Amplitude Stabilization In LC
Oscillators
15.6.4 Negative Resistance in Oscillators
15.6.5 Negative Gm Oscillator
15.6.6 Crystal Oscillators
15.6.7 Ring Oscillators
15.6.8 Positive Feedback and Latchup
Summary
Key Terms
Additional Readings
Problems
APPENDICES
A Standard Discrete Component Values
B Solid-State Device Models and SPICE Simulation Parameters
C Two-Port Review
D Physical Constants and Transistor Model Summary
Index