✦ LIBER ✦

Low power architectures for digital signal processing

✍ Scribed by K. Masselos; P. Merakos; T. Stouraitis; C.E. Goutis

No coin nor oath required. For personal study only.

📜 SIMILAR VOLUMES

Completely-pipelined architectures for d

✍ Cappello, P.; Steiglitz, K. 📂 Article 📅 1983 🏛 IEEE ⚖ 913 KB

CORDIC-based VLSI architectures for digi

✍ Hu, Y.H. 📂 Article 📅 1992 🏛 IEEE 🌐 English ⚖ 187 KB

A Low-Power Heterogeneous Multiprocessor

✍ Paker, Özgün ;Sparsø, Jens ;Haandbæk, Niels ;Isager, Mogens ;Nielsen, Lars Skovb 📂 Article 📅 2004 🏛 Springer 🌐 English ⚖ 190 KB

Parallel processing architectures for ad

✍ VK Jain; JM Wills; SA Wadekar 📂 Article 📅 1992 🏛 Elsevier Science 🌐 English ⚖ 704 KB

VLSI architecture for digital processing

✍ Patrice Le Scan; Marc Soler; Michel Cand 📂 Article 📅 1993 🏛 Springer-Verlag 🌐 English ⚖ 1017 KB

A bit-serial architecture for digital si

✍ Kanopoulos, N. 📂 Article 📅 1985 🏛 IEEE ⚖ 420 KB