✦ LIBER ✦

Completely-pipelined architectures for digital signal processing

✍ Scribed by Cappello, P.; Steiglitz, K.

No coin nor oath required. For personal study only.

📜 SIMILAR VOLUMES

Low power architectures for digital sign

✍ K. Masselos; P. Merakos; T. Stouraitis; C.E. Goutis 📂 Article 📅 2000 🏛 Elsevier Science 🌐 English ⚖ 370 KB

CORDIC-based VLSI architectures for digi

✍ Hu, Y.H. 📂 Article 📅 1992 🏛 IEEE 🌐 English ⚖ 187 KB

Parallel processing architectures for ad

✍ VK Jain; JM Wills; SA Wadekar 📂 Article 📅 1992 🏛 Elsevier Science 🌐 English ⚖ 704 KB

VLSI architecture for digital processing

✍ Patrice Le Scan; Marc Soler; Michel Cand 📂 Article 📅 1993 🏛 Springer-Verlag 🌐 English ⚖ 1017 KB

A bit-serial architecture for digital si

✍ Kanopoulos, N. 📂 Article 📅 1985 🏛 IEEE ⚖ 420 KB

Automatic design of a parallel/pipelined

✍ Yutaka Yokoyama; Yoshikazu Miyanaga; Koji Tochinai 📂 Article 📅 1991 🏛 John Wiley and Sons 🌐 English ⚖ 726 KB