<span>The book is devoted to design and optimization of control units represented by combined finite state machines (CFSMs). The CFSMs combine features of both Mealy and Moore FSMs. Having states of Moore FSM, they produce output signals of both Mealy and Moore types. To optimize the circuits of CFS
Logic Synthesis for FPGA-Based Finite State Machines
β Scribed by Alexander Barkalov, Larysa Titarenko, Malgorzata Kolopienczyk, Kamil Mielcarek, Grzegorz Bazydlo (auth.)
- Publisher
- Springer International Publishing
- Year
- 2016
- Tongue
- English
- Leaves
- 287
- Series
- Studies in Systems, Decision and Control 38
- Edition
- 1
- Category
- Library
No coin nor oath required. For personal study only.
β¦ Synopsis
This book discusses control units represented by the model of a finite state machine (FSM). It contains various original methods and takes into account the peculiarities of field-programmable gate arrays (FPGA) chips and a FSM model. It shows that one of the peculiarities of FPGA chips is the existence of embedded memory blocks (EMB). The book is devoted to the solution of problems of logic synthesis and reduction of hardware amount in control units. The book will be interesting and useful for researchers and PhD students in the area of Electrical Engineering and Computer Science, as well as for designers of modern digital systems.
β¦ Table of Contents
Front Matter....Pages i-xiv
Background of Finite State Machines and Programmable Logic....Pages 1-31
Field Programmable Gate Arrays in FSM Design....Pages 33-64
Object Codes Transformation for Mealy FSMs ....Pages 65-95
Object Codes Transformation for Moore FSMs ....Pages 97-127
Distribution of Class Codes in Moore FSMs....Pages 129-159
Hardware Reduction in Multidirectional Moore FSMs....Pages 161-191
Design of EMB-Based Mealy FSMs....Pages 193-237
Design of EMB-Based Moore FSMs....Pages 239-276
Back Matter....Pages 277-280
β¦ Subjects
Control; Circuits and Systems; Mathematical Modeling and Industrial Mathematics
π SIMILAR VOLUMES
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<p><em>Synthesis of Finite State Machines: Logic Optimization</em> is the second in a set of two monographs devoted to the synthesis of Finite State Machines (FSMs). The first volume, <em>Synthesis of Finite State Machines:</em><em>Functional Optimization</em>, addresses functional optimization, whe
This book discusses Moore finite state machines (FSMs) implemented with field programmable gate arrays (FPGAs) including look-up table (LUT) elements and embedded memory blocks (EMBs). To minimize the number of LUTs in FSM logic circuits, the authors propose replacing a state register with a state c
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