Implementation of front-end processor neural networks
β Scribed by Bahram Nabet; Robert B. Darling; Robert B. Pinter
- Publisher
- Elsevier Science
- Year
- 1992
- Tongue
- English
- Weight
- 884 KB
- Volume
- 5
- Category
- Article
- ISSN
- 0893-6080
No coin nor oath required. For personal study only.
β¦ Synopsis
Electronic implementation o.['a class ofneural networks whose short-wrm nwmoo' equation is governed by multiplicative, rather than additive, inhibition is proposed. The net~z~rk models can be derived from ionic.flow in nerve membranes attd multiplicative ternTs result.6"on7 control of conductive paths by voltages of other cells in the network. Since Field Effect Transistors ( FETs) are voltage controlled conductances when operated below pinch-t~ these netn,orks can be readiO' implemented in FET technolt~gy ??sing this ph)wical propert)'. This class of neural networks appears it? man)' areas of the brain as well as the sensoo' s)wtem attd has beet? used as a basic building block ./or the multilayer self-organizing architecture c?/'Adaptive Resonance Theoo' (ART). The model has been especially usefid [or evplaining a wide range of peripheral visual phenomena. The implementation is intended to spec(/ically demonstrate desirable front-end image processing properties of contrast enhancement, edge detection, dynamic range compression, and adaptation of d),namics to mean inlensio, levels. Since the net~tvrk cat? be math-ematicalO' described, its dynamicw attd stability may be examined. Compatibility o/the network with h(gher level processing alhm's.for its inclusion in mtdtila)'er self-organizing neural network architectures.
π SIMILAR VOLUMES