[IEEE VLSI Signal Processing, IX - San Francisco, CA, USA (30 Oct.-1 Nov. 1996)] VLSI Signal Processing, IX - Low-power digital filter implementations using ternary coefficients

[IEEE VLSI Signal Processing, IX - San F

[IEEE VLSI Signal Processing, IX - San Francisco, CA, USA (30 Oct.-1 Nov. 1996)] VLSI Signal Processing, IX - High-radix parallel dividers for VLSI signal processing

✍ Aoki, T.; Tokoyo, H.; Higuchi, T. 📂 Article 📅 1996 🏛 IEEE ⚖ 516 KB

[IEEE VLSI Signal Processing, IX - San F

[IEEE VLSI Signal Processing, IX - San Francisco, CA, USA (30 Oct.-1 Nov. 1996)] VLSI Signal Processing, IX - Ultra-low-power domain-specific multimedia processors

✍ Abnous, A.; Rabaey, J. 📂 Article 📅 1996 🏛 IEEE 🌐 English ⚖ 584 KB

VISI signal processing components of portable systems in communications are described. System, equipment, and component designs for low power and small size critical to product success are described. Applications to the wireless network adn cellular communications are given.

[IEEE VLSI Signal Processing, IX - San F

[IEEE VLSI Signal Processing, IX - San Francisco, CA, USA (30 Oct.-1 Nov. 1996)] VLSI Signal Processing, IX - Digital upconversion architecture for quadrature modulators

✍ Schaumont, P.; Vernalde, S.; Engels, M.; Bolsens, I. 📂 Article 📅 1996 🏛 IEEE ⚖ 462 KB

[IEEE VLSI Signal Processing, IX - San F

[IEEE VLSI Signal Processing, IX - San Francisco, CA, USA (30 Oct.-1 Nov. 1996)] VLSI Signal Processing, IX - Memory module selection for high level synthesis

✍ Sentieys, O.; Chillet, D.; Diguet, J.P.; Philippe, J.L. 📂 Article 📅 1996 🏛 IEEE ⚖ 589 KB

[IEEE VLSI Signal Processing, IX - San F

[IEEE VLSI Signal Processing, IX - San Francisco, CA, USA (30 Oct.-1 Nov. 1996)] VLSI Signal Processing, IX - Logic synthesis of binary, carry-save and mixed-radix arithmetic for digital signal processing

✍ Bitterlich, S.J.; Meyr, H. 📂 Article 📅 1996 🏛 IEEE 🌐 English ⚖ 576 KB

VISI signal processing components of portable systems in communications are described. System, equipment, and component designs for low power and small size critical to product success are described. Applications to the wireless network adn cellular communications are given.

[IEEE VLSI Signal Processing, IX - San F

[IEEE VLSI Signal Processing, IX - San Francisco, CA, USA (30 Oct.-1 Nov. 1996)] VLSI Signal Processing, IX - VLSI architectures for multiplication in GF(2/sup m/) for application tailored digital signal processors

✍ Drescher, W.; Fettweis, G. 📂 Article 📅 1996 🏛 IEEE ⚖ 571 KB