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[IEEE VLSI Signal Processing, IX - San Francisco, CA, USA (30 Oct.-1 Nov. 1996)] VLSI Signal Processing, IX - VLSI architectures for multiplication in GF(2/sup m/) for application tailored digital signal processors

✍ Scribed by Drescher, W.; Fettweis, G.

Book ID: 126671641
Publisher: IEEE
Year: 1996
Weight: 571 KB
Category: Article
ISBN-13: 9780780331341
DOI: 10.1109/VLSISP.1996.558299

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