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[IEEE Technology of Integrated Systems in Nanoscale Era (DTIS) - Athens, Greece (2011.04.6-2011.04.8)] 2011 6th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS) - Fast time-to-market with via-configurable transistor array regular fabric: A delay-locked loop design case study

✍ Scribed by Pons, M.; Barajas, E.; Mateo, D.; Gonzalez, J. L.; Moll, F.; Rubio, A.; Abella, J.; Vera, X.; Gonzalez, A.

Book ID: 126681695
Publisher: IEEE
Year: 2011
Weight: 560 KB
Category: Article
ISBN: 1612848990
DOI: 10.1109/DTIS.2011.5941428

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