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[IEEE Technology of Integrated Systems in Nanoscale Era (DTIS) - Athens, Greece (2011.04.6-2011.04.8)] 2011 6th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS) - Dynamic LDPC codes for nanoscale memory with varying fault arrival rates

✍ Scribed by Ghosh, Shalini; Lincoln, Patrick D.

Book ID: 121237677
Publisher: IEEE
Year: 2011
Weight: 179 KB
Category: Article
ISBN: 1612848990
DOI: 10.1109/DTIS.2011.5941439

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