[IEEE Design, Automation & Test in Europe Conference - Nice, France (2007.04.16-2007.04.20)] 2007 Design, Automation & Test in Europe Conference & Exhibition - Analytical Router Modeling for Networks-on-Chip Performance Analysis

[IEEE Design, Automation & Test in Europ

[IEEE Design, Automation & Test in Europe Conference - Nice, France (2007.04.16-2007.04.20)] 2007 Design, Automation & Test in Europe Conference & Exhibition - Verification-Guided Soft Error Resilience

✍ Seshia, Sanjit A.; Li, Wenchao; Mitra, Subhasish 📂 Article 📅 2007 🏛 IEEE 🌐 German ⚖ 212 KB

[IEEE Design, Automation & Test in Europ

[IEEE Design, Automation & Test in Europe Conference - Nice, France (2007.04.16-2007.04.20)] 2007 Design, Automation & Test in Europe Conference & Exhibition - Dynamic Learning Based Scan Chain Diagnosis

✍ Huang, Yu 📂 Article 📅 2007 🏛 IEEE ⚖ 397 KB

[IEEE Design, Automation & Test in Europ

[IEEE Design, Automation & Test in Europe Conference - Nice, France (2007.04.16-2007.04.20)] 2007 Design, Automation & Test in Europe Conference & Exhibition - HW/SW Implementation from Abstract Architecture Models

✍ Jerraya, Ahmed Amine 📂 Article 📅 2007 🏛 IEEE 🌐 German ⚖ 96 KB

[IEEE Design, Automation & Test in Europ

[IEEE Design, Automation & Test in Europe Conference - Nice, France (2007.04.16-2007.04.20)] 2007 Design, Automation & Test in Europe Conference & Exhibition - Joint Consideration of Fault-Tolerance, Energy-Efficiency and Performance in On-Chip Networks

✍ Ejlali, Alireza; Al-Hashimi, Bashir M.; Rosinger, Paul; Miremadi, Seyed Ghassem 📂 Article 📅 2007 🏛 IEEE 🌐 German ⚖ 244 KB

[IEEE Design, Automation & Test in Europ

[IEEE Design, Automation & Test in Europe Conference - Nice, France (2007.04.16-2007.04.20)] 2007 Design, Automation & Test in Europe Conference & Exhibition - Joint Consideration of Fault-Tolerance, Energy-Efficiency and Performance in On-Chip Networks

✍ Ejlali, Alireza; Al-Hashimi, Bashir M.; Rosinger, Paul; Miremadi, Seyed Ghassem 📂 Article 📅 2007 🏛 IEEE 🌐 German ⚖ 244 KB

High reliability against noise, low energy consumption and high performance are key objectives in the design of on-chip networks. Recently some researchers have considered the various trade-offs between two of these objectives. However, as we will argue later, the three design objectives should be c

[IEEE Design, Automation & Test in Europ

[IEEE Design, Automation & Test in Europe Conference - Nice, France (2007.04.16-2007.04.20)] 2007 Design, Automation & Test in Europe Conference & Exhibition - Butterfly and Benes-Based on-Chip Communication Networks for Multiprocessor Turbo Decoding

✍ Moussa, Hazem; Muller, Olivier; Baghdadi, Amer; Jezequel, Michel 📂 Article 📅 2007 🏛 IEEE 🌐 German ⚖ 416 KB