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[IEEE Comput. Soc Meeting on Design Automation and Test in Europe - Paris, France (27-30 March 2000)] Proceedings Design, Automation and Test in Europe Conference and Exhibition 2000 (Cat. No. PR00537) - A VHDL-based methodology for the design and verification of pipeline A/D converters

✍ Scribed by Peralias, E.; Acosta, A.J.; Rueda, A.; Huertas, J.L.

Book ID: 121282948
Publisher: IEEE Comput. Soc
Year: 2000
Tongue: English
Weight: 171 KB
Category: Article
ISBN-13: 9780769505374
DOI: 10.1109/DATE.2000.840837

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