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[IEEE Comput. Soc 16th International Conference on VLSI Design. Concurrently with the 2nd International Conference on Embedded Systems Design - New Delhi, India (4-8 Jan. 2003)] 16th International Conference on VLSI Design, 2003. Proceedings. - Analyzing soft errors in leakage optimized SRAM design

โœ Scribed by Degalahal, V.; Vijaykrishnan, N.; Irwin, M.J.

Book ID
117990262
Publisher
IEEE Comput. Soc
Year
2003
Tongue
English
Weight
277 KB
Volume
0
Category
Article
ISBN-13
9780769518688

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โœฆ Synopsis

The 87 papers in this proceedings of the January 2003 conference reflect the theme of convergence in system-on-a-chip design and the increasing need to design and verify hardware and software simultaneously. The collection explores on-going research in field programmable gate arrays, MOS technology, VLSI processors, memory technology, test optimization, low power technologies, and reconfigurable system software. Topics include interfacing cores with on-chip packet-switched networks, the effects of multi-cycle sensitization on delay tests, a cryptosystem designed for embedded system security, and a low power BIST design for scan-based logic circuits. No subject index. Annotation c. Book News, Inc., Portland, OR

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