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[IEEE Asia and South Pacific Conference on Design Automation, 2006. - Yokohama, Japan (Jan. 24, 2006)] Asia and South Pacific Conference on Design Automation, 2006. - Robust analytical gate delay modeling for low voltage circuits

✍ Scribed by Ramalingam, A.; Kodakara, S.V.; Devgan, A.; Pan, D.Z.

Book ID: 126914411
Publisher: IEEE
Year: 2006
Tongue: English
Weight: 312 KB
Category: Article
ISBN-13: 9780780394513
DOI: 10.1109/aspdac.2006.1594646

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