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[IEEE 21st International Conference on VLSI Design (VLSID 2008) - Hyderabad, India (2008.01.4-2008.01.8)] 21st International Conference on VLSI Design (VLSID 2008) - Dynamic Error Detection for Dependable Cache Coherency in Multicore Architectures

✍ Scribed by Wang, Hui; Baldawa, Sandeep; Sangireddy, Rama

Book ID: 126671638
Publisher: IEEE
Year: 2008
Weight: 657 KB
Category: Article
ISBN-13: 9780769530833
DOI: 10.1109/VLSI.2008.68

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