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[IEEE 21st International Conference on VLSI Design (VLSID 2008) - Hyderabad, India (2008.01.4-2008.01.8)] 21st International Conference on VLSI Design (VLSID 2008) - Power Attack Resistant Efficient FPGA Architecture for Karatsuba Multiplier

✍ Scribed by Rebeiro, Chester; Mukhpodhyay, Debdeep

Book ID: 127104645
Publisher: IEEE
Year: 2008
Tongue: English
Weight: 674 KB
Category: Article
ISBN-13: 9780769530833
DOI: 10.1109/vlsi.2008.65

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