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[IEEE 2014 IEEE Symposium on VLSI Circuits - Honolulu, HI, USA (2014.6.10-2014.6.13)] 2014 Symposium on VLSI Circuits Digest of Technical Papers - Highly reliable and low-power nonvolatile cache memory with advanced perpendicular STT-MRAM for high-performance CPU

✍ Scribed by Noguchi, Hiroki; Ikegami, Kazutaka; Shimomura, Naoharu; Tetsufumi, Tanamoto; Ito, Junichi; Fujita, Shinobu

Book ID: 127321212
Publisher: IEEE
Year: 2014
Weight: 532 KB
Category: Article
ISBN: 1479933260
DOI: 10.1109/vlsic.2014.6858403

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