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[IEEE 2014 IEEE Symposium on VLSI Circuits - Honolulu, HI, USA (2014.6.10-2014.6.13)] 2014 Symposium on VLSI Circuits Digest of Technical Papers - A 12-bit 210-MS/s 5.3-mW pipelined-SAR ADC with a passive residue transfer technique

✍ Scribed by Chin-Yu Lin, ; Tai-Cheng Lee,

No coin nor oath required. For personal study only.

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