𝔖 Bobbio Scriptorium

✦ LIBER ✦

[IEEE 2011 IEEE International Symposium on Circuits and Systems (ISCAS) - Rio de Janeiro, Brazil (2011.05.15-2011.05.18)] 2011 IEEE International Symposium of Circuits and Systems (ISCAS) - A high-throughput LDPC decoder architecture for high-rate WPAN systems

✍ Scribed by Baek, Kyung-Il; Lee, Hanho; Choi, Chang-Seok; Kim, Sangmin; Sobelman, Gerald E.

Book ID: 111891083
Publisher: IEEE
Year: 2011
Weight: 369 KB
Volume: 0
Category: Article
ISBN: 1424494737
DOI: 10.1109/iscas.2011.5937812

No coin nor oath required. For personal study only.

📜 SIMILAR VOLUMES

[IEEE 2011 IEEE International Symposium

[IEEE 2011 IEEE International Symposium on Circuits and Systems (ISCAS) - Rio de Janeiro, Brazil (2011.05.15-2011.05.18)] 2011 IEEE International Symposium of Circuits and Systems (ISCAS) - Memory efficient layered decoder design with early termination for LDPC codes

✍ Li, Jiangpeng; He, Guanghui; Hou, Hexi; Zhang, Zhejun; Ma, Jun 📂 Article 📅 2011 🏛 IEEE ⚖ 510 KB

[IEEE 2011 IEEE International Symposium

[IEEE 2011 IEEE International Symposium on Circuits and Systems (ISCAS) - Rio de Janeiro, Brazil (2011.05.15-2011.05.18)] 2011 IEEE International Symposium of Circuits and Systems (ISCAS) - A phase-noise model for nonlinear piezoelectrically-actuated MEMS oscillators

✍ Pardo, Mauricio; Sorenson, Logan; Ayazi, Farrokh 📂 Article 📅 2011 🏛 IEEE ⚖ 988 KB

[IEEE 2011 IEEE International Symposium

[IEEE 2011 IEEE International Symposium on Circuits and Systems (ISCAS) - Rio de Janeiro, Brazil (2011.05.15-2011.05.18)] 2011 IEEE International Symposium of Circuits and Systems (ISCAS) - A multiparametric biosensor array for on-chip cell culture with feedback controlled microfluidics

✍ Welch, David; Blain Christen, Jennifer 📂 Article 📅 2011 🏛 IEEE ⚖ 498 KB

[IEEE 2008 IEEE International Symposium

[IEEE 2008 IEEE International Symposium on Circuits and Systems - ISCAS 2008 - Seattle, WA, USA (2008.05.18-2008.05.21)] 2008 IEEE International Symposium on Circuits and Systems - VLSI decoding architecture with improved convergence speed and reduced decoding latency for irregular LDPC codes in WiMAX

✍ Yeong-Luh Ueng, ; Chung-Jay Yang, ; Zong-Cheng Wu, ; Chen-Eng Wu, ; Yu-Lun Wang, 📂 Article 📅 2008 🏛 IEEE ⚖ 423 KB

[IEEE 2010 IEEE International Symposium

[IEEE 2010 IEEE International Symposium on Circuits and Systems - ISCAS 2010 - Paris, France (2010.05.30-2010.06.2)] Proceedings of 2010 IEEE International Symposium on Circuits and Systems - Low power decoder design for QC-LDPC codes

✍ He, Kai; Sha, Jin; Li, Li; Wang, Zhongfeng 📂 Article 📅 2010 🏛 IEEE ⚖ 277 KB

[IEEE 2011 10th International Symposium

[IEEE 2011 10th International Symposium on Signals, Circuits and Systems (ISSCS) - Iasi, Romania (2011.06.30-2011.07.1)] ISSCS 2011 - International Symposium on Signals, Circuits and Systems - FPGA implementation of a low-area/high-SFDR DDFS architecture

✍ Cardarilli, G. C.; D'Alessio, M.; Di Nunzio, L.; Fazzolari, R.; Murgia, D.; Re, 📂 Article 📅 2011 🏛 IEEE ⚖ 786 KB