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[IEEE 2011 IEEE International Symposium on Circuits and Systems (ISCAS) - Rio de Janeiro, Brazil (2011.05.15-2011.05.18)] 2011 IEEE International Symposium of Circuits and Systems (ISCAS) - Memory efficient layered decoder design with early termination for LDPC codes

✍ Scribed by Li, Jiangpeng; He, Guanghui; Hou, Hexi; Zhang, Zhejun; Ma, Jun

Book ID: 111889002
Publisher: IEEE
Year: 2011
Weight: 510 KB
Volume: 0
Category: Article
ISBN: 1424494737
DOI: 10.1109/iscas.2011.5938161

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