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[IEEE 2011 IEEE Computer Society Annual Symposium on VLSI (ISVLSI) - Chennai, India (2011.07.4-2011.07.6)] 2011 IEEE Computer Society Annual Symposium on VLSI - Design of a Low Power, High Speed Complementary Input Folded Regulated Cascode OTA for a Parallel Pipeline ADC

✍ Scribed by Hati, Manas Kumar; Bhattacharyya, Tarun K.

No coin nor oath required. For personal study only.

📜 SIMILAR VOLUMES

[IEEE 2011 IEEE Computer Society Annual

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