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[IEEE 2011 IEEE Computer Society Annual Symposium on VLSI (ISVLSI) - Chennai, India (2011.07.4-2011.07.6)] 2011 IEEE Computer Society Annual Symposium on VLSI - Gate Sizing Minimizing Delay and Area

✍ Scribed by Posser, Gracieli; Flach, Guilherme; Wilke, Gustavo; Reis, Ricardo

Book ID: 126616038
Publisher: IEEE
Year: 2011
Weight: 171 KB
Category: Article
ISBN: 1457708035
DOI: 10.1109/ISVLSI.2011.92

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