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[IEEE 2011 Design, Automation & Test in Europe - Grenoble (2011.03.14-2011.03.18)] 2011 Design, Automation & Test in Europe - A clock-gating based capture power droop reduction methodology for at-speed scan testing

✍ Scribed by Bo Yang, ; Sanghani, A; Sarangi, S; Chunsheng Liu,

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