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[IEEE 2010 23rd International Conference on VLSI Design: concurrently with the 9th International Conference on Embedded Systems Design (VLSID) - Bangalore, India (2010.01.3-2010.01.7)] 2010 23rd International Conference on VLSI Design - High Speed Clock and Data Recovery Circuit with Novel Jitter Reduction Technique

✍ Scribed by Desai, Kunal; Nagulapalli, Rajasekhar; Krishna, Vijay; Palwai, Rajkumar; Venkatesan, Pravin Kumar; Khawshe, Vijay

Book ID: 120528420
Publisher: IEEE
Year: 2010
Weight: 896 KB
Category: Article
ISBN: 1424455413
DOI: 10.1109/VLSI.Design.2010.104

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