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[IEEE 2009 10th International Symposium on Quality of Electronic Design (ISQED) - San Jose, CA, USA (2009.03.16-2009.03.18)] 2009 10th International Symposium on Quality of Electronic Design - Leakage optimization using transistor-level dual threshold voltage cell library

✍ Scribed by Nagarajan, Chandra S.; Yuan, Lin; Qu, Gang; Stamps, Barbara G.

Book ID: 126173152
Publisher: IEEE
Year: 2009
Tongue: English
Weight: 182 KB
Category: Article
ISBN: 1424429528
DOI: 10.1109/ISQED.2009.4810270

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