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[IEEE 2008 International Conference on Field Programmable Logic and Applications (FPL) - Heidelberg, Germany (2008.09.8-2008.09.10)] 2008 International Conference on Field Programmable Logic and Applications - Power reduction techniques for Dynamically Reconfigurable Processor Arrays

✍ Scribed by Nishimura, T.; Hirai, K.; Saito, Y.; Nakamura, T.; Hasegawa, Y.; Tsutsusmi, S.; Tunbunheng, V.; Amano, H.

Book ID: 120981143
Publisher: IEEE
Year: 2008
Weight: 140 KB
Category: Article
ISBN: 1424419603
DOI: 10.1109/FPL.2008.4629949

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