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[IEEE 2008 International Conference on Field Programmable Logic and Applications (FPL) - Heidelberg, Germany (2008.09.8-2008.09.10)] 2008 International Conference on Field Programmable Logic and Applications - An FPGA-based implementation of the MINRES algorithm

✍ Scribed by Boland, David; Constantinides, George A.

Book ID: 120610698
Publisher: IEEE
Year: 2008
Weight: 160 KB
Category: Article
ISBN: 1424419603
DOI: 10.1109/FPL.2008.4629967

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