[IEEE 1998 Symposium on VLSI Technology Digest of Technical Papers - Honolulu, HI, USA (9-11 June 1998)] 1998 Symposium on VLSI Technology Digest of Technical Papers (Cat. No.98CH36216) - A 0.21 μm/sup 2/ 7F/sup 2/ trench cell with a locally-open globally-folded dual bitline for 1 Gb/4 Gb DRAM
✍ Scribed by Radens, C.J.; Gruening, U.; Weybright, M.E.; DeBrosse, J.K.; Kleinhenz, R.L.; Hoenigschmid, H.; Thomas, A.C.; Mandelman, J.A.; Alsmeier, J.; Bronner, G.B.
- Book ID
- 126674586
- Publisher
- IEEE
- Year
- 1998
- Weight
- 238 KB
- Category
- Article
- ISBN-13
- 9780780347700
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