✍ Scribed by Daniel D. Gajski (auth.), Raul Camposano, Wayne Wolf (eds.)
No coin nor oath required. For personal study only.
The time has come for high-level synthesis. When research into synthesizing hardware from abstract, program-like de scriptions started in the early 1970' s, there was no automated path from the register transfer design produced by high-level synthesis to a complete hardware imple mentation. As a result, it was very difficult to measure the effectiveness of high level synthesis methods; it was also hard to justify to users the need to automate architecture design when low-level design had to be completed manually. Today's more mature CAD techniques help close the gap between an automat ically synthesized design and a manufacturable design. Market pressures encour age designers to make use of any and all automated tools. Layout synthesis, logic synthesis, and specialized datapath generators make it feasible to quickly imple ment a register-transfer design in silicon,leaving designers more time to consider architectural improvements. As IC design becomes more automated, customers are increasing their demands; today's leading edge designers using logic synthesis systems are training themselves to be tomorrow's consumers of high-level synthe sis systems. The need for very fast turnaround, a competitive fabrication market WhlCh makes small-quantity ASIC manufacturing possible, and the ever growing co:n plexity of the systems being designed, all make higher-level design automaton inevitable.
Front Matter....Pages i-x
Essential Issues and Possible Solutions in High-Level Synthesis....Pages 1-26
Architectural synthesis for medium and high throughput signal processing with the new Cathedral environment....Pages 27-54
PISYN — High-Level Synthesis of Application Specific Pipelined Hardware....Pages 55-78
The IBM High-Level Synthesis System....Pages 79-104
MICON: Automated Design of Computer Systems....Pages 105-125
Cyber: High Level Synthesis System from Software into ASIC....Pages 127-151
Specification and Synthesis of Interface Logic....Pages 153-176
Synthesis of ASICs with Hercules and Hebe....Pages 177-203
Synthesis From Pure Behavioral Descriptions....Pages 205-229
Architectural Optimization Methods for Control-Dominated Machines....Pages 231-254
Global Scheduling and Allocation Algorithms in the HAL System....Pages 255-281
High Level Synthesis in the THEDA System....Pages 283-306
Industrial Uses of the System Architect’s Workbench....Pages 307-329
Unified System Construction (USC)....Pages 331-354
Scheduling and Assignment in High Level Synthesis....Pages 355-382
Back Matter....Pages 383-390
Circuits and Systems; Electrical Engineering; Computer-Aided Engineering (CAD, CAE) and Design
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