High-Level Power Analysis and Optimization

✍ Scribed by Anand Raghunathan, Niraj K. Jha, Sujit Dey (auth.)

• Publisher: Springer US
• Year: 1998
• Tongue: English
• Leaves: 185
• Edition: 1
• Category: Library

✦ Synopsis

High-Level Power Analysis and Optimization presents a comprehensive description of power analysis and optimization techniques at the higher (architecture and behavior) levels of the design hierarchy, which are often the levels that yield the most power savings. This book describes power estimation and optimization techniques for use during high-level (behavioral synthesis), as well as for designs expressed at the register-transfer or architecture level.
High-Level Power Analysis and Optimization surveys the state-of-the-art research on the following topics: power estimation/macromodeling techniques for architecture-level designs, high-level power management techniques, and high-level synthesis optimizations for low power.
High-Level Power Analysis and Optimization will be very useful reading for students, researchers, designers, design methodology developers, and EDA tool developers who are interested in low-power VLSI design or high-level design methodologies.

✦ Table of Contents

Front Matter....Pages i-xix
Introduction....Pages 1-15
Background....Pages 17-35
Architecture-Level Power Estimation....Pages 37-79
Power Management....Pages 81-114
High-Level Synthesis for Low Power....Pages 115-153
Conclusions and Future Work....Pages 155-157
Back Matter....Pages 159-175

✦ Subjects

Circuits and Systems; Electrical Engineering; Computer-Aided Engineering (CAD, CAE) and Design