✦ LIBER ✦

High-level crosstalk defect Simulation methodology for system-on-chip interconnects

✍ Scribed by Xiaoliang Bai; Dey, S.

No coin nor oath required. For personal study only.

📜 SIMILAR VOLUMES

Testing for Interconnect Crosstalk Defec

✍ Li Chen; Xiaoliang Bai; Sujit Dey 📂 Article 📅 2002 🏛 Springer US 🌐 English ⚖ 283 KB

A method for detecting interconnect DSM

✍ Shih-yu Yang; Papachristou, C.A. 📂 Article 📅 2006 🏛 IEEE 🌐 English ⚖ 243 KB

A Behavior Model of an On-Chip High Volt

✍ Tanzawa, T. 📂 Article 📅 2012 🏛 IEEE 🌐 English ⚖ 576 KB

On the design and optimization of symmet

✍ José C. García; Juan A. Montiel-Nelson; Saeid Nooshabadi 📂 Article 📅 2008 🏛 Springer 🌐 English ⚖ 551 KB

[IEEE 2011 International Workshop on Sys

✍ More, A.; Taskin, B. 📂 Article 📅 2011 🏛 IEEE ⚖ 44 KB

Realistic end-to-end simulation of the o

✍ Kyriakis-Bitzaros, E.D.; Haralabidis, N.; Lagadas, M.; Georgakilas, A.; Moisiadi 📂 Article 📅 2001 🏛 Optical Society of America 🌐 English ⚖ 267 KB