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Fully-Depleted SOI CMOS Circuits and Technology || Ultralow-Power Circuit Design with FD-SOI Devices

✍ Scribed by Matsuzawa, Akira

No coin nor oath required. For personal study only.

📜 SIMILAR VOLUMES

Fully-Depleted SOI CMOS Technology for L

✍ D. Flandre; J. P. Colinge; J. Chen; D. De Ceuster; J. P. Eggermont; L. Ferreira; 📂 Article 📅 1999 🏛 Springer 🌐 English ⚖ 283 KB

Modelling and application of fully deple

✍ D. Flandre; L.F. Ferreira; P.G.A. Jespers; J.-P. Colinge 📂 Article 📅 1996 🏛 Elsevier Science 🌐 English ⚖ 508 KB

Considerations for the design of an SRAM

📂 Article 📅 1989 🏛 Elsevier Science 🌐 English ⚖ 125 KB

A 243-GHz Ft and 208-GHz Fmax, 90-nm SOI

✍ Plouchart, J.-O.; Zamdmer, N.; Jonghae Kim; Trzcinski, R.; Narasimha, S.; Khare, 📂 Article 📅 2005 🏛 IEEE 🌐 English ⚖ 842 KB

[IEEE 2003 IEEE International Conference

✍ Ericson, ; Britton, ; Rochelle, ; Blalock, ; Williamson, ; Greenwell, ; Schultz, 📂 Article 📅 2003 🏛 IEEE ⚖ 182 KB