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Fan-Out Wafer-Level Packaging

✍ Scribed by John H. Lau

Publisher
Springer Singapore
Year
2018
Tongue
English
Leaves
319
Edition
1st ed.
Category
Library
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✦ Synopsis

This comprehensive guide to fan-out wafer-level packaging (FOWLP) technology compares FOWLP with flip chip and fan-in wafer-level packaging. It presents the current knowledge on these key enabling technologies for FOWLP, and discusses several packaging technologies for future trends. The Taiwan Semiconductor Manufacturing Company (TSMC) employed their InFO (integrated fan-out) technology in A10, the application processor for Apple’s iPhone, in 2016, generating great excitement about FOWLP technology throughout the semiconductor packaging community. For many practicing engineers and managers, as well as scientists and researchers, essential details of FOWLP – such as the temporary bonding and de-bonding of the carrier on a reconstituted wafer/panel, epoxy molding compound (EMC) dispensing, compression molding, Cu revealing, RDL fabrication, solder ball mounting, etc. – are not well understood.

Intended to help readers learn the basics of problem-solving methods and understand the trade-offs inherent in making system-level decisions quickly, this book serves as a valuable reference guide for all those faced with the challenging problems created by the ever-increasing interest in FOWLP, helps to remove roadblocks, and accelerates the design, materials, process, and manufacturing development of key enabling technologies for FOWLP.

✦ Table of Contents

Front Matter ....Pages i-xx
Patent Issues of Fan-Out Wafer-Level Packaging (John H. Lau)....Pages 1-20
Flip Chip Technology Versus FOWLP (John H. Lau)....Pages 21-68
Fan-in Wafer-Level Packaging Versus FOWLP (John H. Lau)....Pages 69-113
Embedded Chip Packaging (John H. Lau)....Pages 115-125
FOWLP: Chip-First and Die Face-Down (John H. Lau)....Pages 127-143
FOWLP: Chip-First and Die Face-Up (John H. Lau)....Pages 145-194
FOWLP: Chip-Last or RDL-First (John H. Lau)....Pages 195-206
FOWLP: PoP (John H. Lau)....Pages 207-216
Fan-Out Panel-Level Packaging (FOPLP) (John H. Lau)....Pages 217-230
3D Integration (John H. Lau)....Pages 231-268
3D IC Heterogeneous Integration by FOWLP (John H. Lau)....Pages 269-303

✦ Subjects

Engineering; Circuits and Systems; Nanotechnology and Microengineering; Optical and Electronic Materials

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