Enhanced source-degenerated CMOS differential transconductor

✍ Scribed by J.M. Martinez-Heredia; A. Torralba

• Book ID: 104053565
• Publisher: Elsevier Science
• Year: 2011
• Tongue: English
• Weight: 735 KB
• Volume: 42
• Category: Article
• ISSN: 0026-2692
• DOI: 10.1016/j.mejo.2010.10.011

✦ Synopsis

A simple technique to improve the output resistance and the linearity of a source-degenerated differential CMOS transconductor is presented, useful even under low supply voltage. It combines the utilization of a super-transistor as a unity-gain buffer and the use of the weak inversion region to optimize a regulated cascode source. Using a standard 0.13 mm CMOS technology with 1.5 V supply voltage, simulation results

show the transconductor attains more than 1 GO as differential output resistance and a third-order harmonic distortion factor less than À 110 dB at 1 kHz for a 0.35 V pp differential input signal. Other performances are 126 mW power consumption and 65 MHz bandwidth.