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Development of a fast time-to-digital converter using a programmable gate array

โœ Scribed by Shun'ichi Mine; Katsuo Tokushuku; Sakue Yamada


Publisher
Elsevier Science
Year
1995
Tongue
English
Weight
403 KB
Volume
357
Category
Article
ISSN
0168-9002

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๐Ÿ“œ SIMILAR VOLUMES


Implementation of Petri nets using a fie
โœ S. K. Yang; T. S. Liu ๐Ÿ“‚ Article ๐Ÿ“… 2000 ๐Ÿ› John Wiley and Sons ๐ŸŒ English โš– 507 KB

Although Petri nets have various capabilities, the Petri net approach is done on paper. A field-programmable gate array (FPGA) is implemented in this study so as to realize basic Petri net symbols, logic structures in Petri nets, and specific functions for Petri nets by logic circuits. As an example