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Detection of false paths in logical circuits by joint analysis of the AND/OR trees and SSBDD-graphs

✍ Scribed by A. Yu. Matrosova, S. A. Ostanin, V. Singh

Book ID: 120967057
Publisher: SP MAIK Nauka/Interperiodica
Year: 2013
Tongue: English
Weight: 520 KB
Volume: 74
Category: Article
ISSN: 0005-1179
DOI: 10.1134/S0005117913070084

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