Design of High-Speed Communication Circuits

✍ Scribed by Ramesh Harjani

• Publisher: World Scientific Pub Co Inc
• Year: 2006
• Tongue: English
• Leaves: 233
• Series: Selcted Topics in Electronics and Systems
• Category: Library

✦ Synopsis

MOS technology has rapidly become the de facto standard for mixed-signal integrated circuit design due to the high levels of integration possible as device geometries shrink to nanometer scales. The reduction in feature size means that the number of transistor and clock speeds have increased significantly. In fact, current day microprocessors contain hundreds of millions of transistors operating at multiple gigahertz. Furthermore, this reduction in feature size also has a significant impact on mixed-signal circuits. Due to the higher levels of integration, the majority of ASICs possesses some analog components. It has now become nearly mandatory to integrate both analog and digital circuits on the same substrate due to cost and power constraints. This book presents some of the newer problems and opportunities offered by the small device geometries and the high levels of integration that is now possible. The aim of this book is to summarize some of the most critical aspects of high-speed analog/RF communications circuits. Attention is focused on the impact of scaling, substrate noise, data converters, RF and wireless communication circuits and wireline communication circuits, including high-speed I/O.

✦ Table of Contents

Front-cover......Page 1
Front-matter......Page 2
SELECTED TOPICS IN ELECTRONICS AND SYSTEMS......Page 3
Copyright......Page 5
Preface......Page 6
CONTENTS......Page 10
1 Introduction......Page 11
2 Transistor Mismatch......Page 12
3 Methods of Achieving Yield......Page 16
4 Alternative Techniques for Nanometer CMOS......Page 27
References......Page 30
1 Introduction......Page 33
2 Self-Induced Noise-Injection and Sensing Mechanisms......Page 35
3 Extraction of Substrate Parasitics......Page 37
4 Conclusions......Page 49
References......Page 50
1 Introduction......Page 53
2 Single-Loop AE Modulator Topologies......Page 54
3 Time-Interleaved AE Modulators......Page 60
4 Continuous-Time AE Modulators......Page 64
References......Page 71
1 Introduction......Page 75
2 LC Tank-based VCO Design......Page 76
3 Design Examples......Page 97
4 Summary and Conclusions......Page 102
References......Page 105
1 Introduction......Page 109
2 Interpreting Specifications......Page 110
3 Types of Frequency Synthesizers......Page 115
4 Phase Locked Loop (PLL) Design......Page 118
5 Recent Progress in Frequency Synthesizer Design Techniques......Page 125
References......Page 128
1 Introduction......Page 133
2 Radio Receiver Architectures......Page 134
3 Low Noise Amplifiers......Page 145
4 Mixers......Page 155
5 Voltage-controlled Oscillators......Page 166
References......Page 182
1 Introduction......Page 185
2 Channel Modeling......Page 186
3 Performance Metrics......Page 189
5 Transmit Equalizers......Page 192
6 Receive Equalizers......Page 195
7 Transmit and Receive Equalizers......Page 208
8 Adaptation......Page 210
References......Page 211
1 Introduction......Page 215
2 Crosstalk Cancellation Technique......Page 217
3 Transceiver Design......Page 220
4 Receive Front-End Equalizer Design......Page 224
5 Circuit Implementation......Page 226
7 Conclusions......Page 229
References......Page 231