𝔖 Bobbio Scriptorium
✦   LIBER   ✦

Design and implementation of a high-performance 60-GHz CMOS slot antenna

✍ Scribed by Chih-Ying Lin; Yo-Sheng Lin; Hsin-Chia Lu; Yi-Long Chang


Book ID
112145080
Publisher
John Wiley and Sons
Year
2012
Tongue
English
Weight
917 KB
Volume
54
Category
Article
ISSN
0895-2477

No coin nor oath required. For personal study only.


πŸ“œ SIMILAR VOLUMES


Design and implementation of a high-perf
✍ Jin-Fa Chang; Yo-Sheng Lin πŸ“‚ Article πŸ“… 2010 πŸ› John Wiley and Sons 🌐 English βš– 662 KB

Testing is performed by comparison of results from the RBFNN model and the ADS circuit model with the test frequency points (2.41-2.535 GHz, step-size ΒΌ 0.025 GHz), and input powers (Γ€9-33 dBm, step-size ΒΌ 1.5 dBm). Figures 4(a) and 4(b) show the AM/AM and AM/PM distortion versus input powers at dif

Design and implementation of a miniaturi
✍ Yo-Sheng Lin; Zheng-Hua Yang; Chi-Chen Chen; Tai-Cheng Chao πŸ“‚ Article πŸ“… 2007 πŸ› John Wiley and Sons 🌐 English βš– 325 KB

## Abstract In this article, we demonstrate a miniaturized high‐linearity (IIP3 = 8 dBm at 4 GHz) 3–5‐GHz ultrawideband low‐noise amplifier (LNA) implemented in a standard 0.18‐μm CMOS technology. The inductive‐series peaking technique was used to enhance the gain and bandwidth performances of the