Design and FPGA-Implementation of a High Performance Timing Recovery Loop for Broadband Communications

✍ Scribed by V. Torres; A. Pérez-Pascual; T. Sansaloni; J. Valls

• Publisher: Springer US
• Year: 2008
• Tongue: English
• Weight: 411 KB
• Volume: 56
• Category: Article
• ISSN: 1939-8018
• DOI: 10.1007/s11265-008-0252-0