A high level power model for Network-on-
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Seung Eun Lee; Nader Bagherzadeh
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Article
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2009
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Elsevier Science
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English
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This paper presents a high level power estimation methodology for a Network-on-Chip (NoC) router, that is capable of providing cycle accurate power profile to enable power exploration at system level. Our power macro model is based on the number of flits passing through a router as the unit of abstr