Design of a 9 GHz CMOS low noise amplifi
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Sen Wang
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Article
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2011
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John Wiley and Sons
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English
⚖ 405 KB
## Abstract In this article, a 9 GHz low noise amplifier (LNA) using gain‐enhanced technique is presented. The compact and high‐gain LNA with cascode topology is implemented in a standard 0.18‐μm CMOS process. The gain‐enhanced technique consists of two inductors in the common gate (CG) stage of th