Computer-Aided Design and VLSI Device Development

✍ Scribed by Kit Man Cham, Soo-Young Oh, John L. Moll, Keunmyung Lee, Paul Vande Voorde, Daeje Chin (auth.)

• Publisher: Springer US
• Year: 1988
• Tongue: English
• Leaves: 377
• Series: The Kluwer International Series in Engineering and Computer Science 53
• Edition: 2
• Category: Library

✦ Synopsis

examples are presented. These chapters are intended to introduce the reader to the programs. The program structure and models used will be described only briefly. Since these programs are in the public domain (with the exception of the parasitic simulation programs), the reader is referred to the manuals for more details. In this second edition, the process program SUPREM III has been added to Chapter 2. The device simulation program PISCES has replaced the program SIFCOD in Chapter 3. A three-dimensional parasitics simulator FCAP3 has been added to Chapter 4. It is clear that these programs or other programs with similar capabilities will be indispensible for VLSI/ULSI device developments. Part B of the book presents case studies, where the application of simu­ lation tools to solve VLSI device design problems is described in detail. The physics of the problems are illustrated with the aid of numerical simulations. Solutions to these problems are presented. Issues in state-of-the-art device development such as drain-induced barrier lowering, trench isolation, hot elec­ tron effects, device scaling and interconnect parasitics are discussed. In this second edition, two new chapters are added. Chapter 6 presents the methodol­ ogy and significance of benchmarking simulation programs, in this case the SUPREM III program. Chapter 13 describes a systematic approach to investi­ gate the sensitivity of device characteristics to process variations, as well as the trade-otIs between different device designs.

✦ Table of Contents

Front Matter....Pages i-xiii
Overview....Pages 1-10
Front Matter....Pages 11-11
Numerical Simulation Systems....Pages 13-21
Process Simulation....Pages 23-69
Device Simulation....Pages 71-127
Parasitic Elements Simulation....Pages 129-140
Front Matter....Pages 141-141
Methodology in Computer-Aided Design for Process and Device Development....Pages 143-150
SUPREM III Application....Pages 151-165
Simulation Techniques for Advanced Device Development....Pages 167-195
Drain-Induced Barrier Lowering in Short Channel Transistors....Pages 197-209
A Study of LDD Device Structure Using 2-D Simulations....Pages 211-231
The Surface Inversion Problem in Trench Isolated CMOS....Pages 233-250
Development of Isolation Structures for Applications in VLSI....Pages 251-270
Transistor Design for Submicron CMOS Technology....Pages 271-300
A Systematic Study of Transistor Design Traae-offs....Pages 301-313
MOSFET Scaling by CADDET....Pages 315-334
Examples of Parasitic Elements Simulation....Pages 335-357
Back Matter....Pages 359-379

✦ Subjects

Electrical Engineering