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CMOS top-series coupling quadrature injection-locked frequency divider

✍ Scribed by Sheng-Lyang Jang; Sheng-Chien Wu; Chien-Feng Lee; M.-H. Juang

Publisher
John Wiley and Sons
Year
2008
Tongue
English
Weight
626 KB
Volume
50
Category
Article
ISSN
0895-2477

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✦ Synopsis

Abstract

This article presents a new divide‐by‐2 injection‐locked frequency divider (ILFD). The ILFD consists of a 2.1‐GHz top‐series quadrature voltage‐controlled oscillator (QVCO) and two NMOS switches, which are in parallel with the QVCO resonators for signal injection. The proposed CMOS ILFD uses three‐dimensional inductor to save chip area and has been implemented with the TSMC 0.18‐μm CMOS technology and the core power consumption is 9.36 mW at the supply voltage of 0.9 V. The free‐running frequency of the ILFD is tunable from 2.02 to 2.28 GHz. At the input power of −8 dBm, the total divide‐by‐2 locking range is from 3.6 to 6.05 GHz as the tuning voltage is varied from 0 to 0.9 V. The phase noise of the locked output spectrum is lower than that of free running ILFD in the ÷2 mode. The phase deviation of quadrature output is about 0.19°. © 2008 Wiley Periodicals, Inc. Microwave Opt Technol Lett 50: 2554–2557, 2008; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/mop.23724

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